A flat-panel display is a matrix-addressed flat-panel device typically formed with a baseplate structure and a faceplate structure situated opposite the baseplate structure. In a flat-panel CRT display of the gated field-emission type ("field-emission display"), the baseplate structure contains a generally flat baseplate, a lower level of generally parallel emitter electrodes extending over the interior surface of the baseplate, a dielectric layer overlying the emitter electrodes, and an upper level of control (or gate) electrodes extending over the dielectric layer generally perpendicular to the emitter electrodes. Electron-emissive elements are situated in cavities in the dielectric layer and are exposed through openings in the control electrodes.
During operation of the field-emission display ("FED"), electrons emitted from selected electron-emissive elements move towards the faceplate structure. The electrons strike corresponding light-emissive regions in the faceplate structure and cause them to emit light that produces an image on the exterior surface of a transparent faceplate. Each of the locations at which one of the control electrodes crosses one of the emitter electrodes in the baseplate structure defines a picture element ("pixel") in a black and white display and a sub-pixel in a color display, three sub-pixels normally forming a color pixel.
Various types of defects can arise during flat-panel display fabrication. In a display having a plate structure that contains multiple levels of electrodes such as the baseplate structure of an FED, short circuits are of particular concern. A short circuit defect arises when an electrode in one level is unintentionally connected to an electrode in another level. For example, a short circuit defect can occur in an FED when an electrically conductive path extends through the inter-electrode dielectric layer to connect a control electrode to an emitter electrode.
Detection of short circuit defects is an important part of flat-panel display manufacture. In some instances, a short circuit defect can be corrected before the plate structures are connected together, thereby transforming a potentially defective display into a fully operative one. In other instances, a short circuit defect can be cut out of the display. While part of all of a pixel or sub-pixel is lost, the performance of the remainder of the display is often not affected significantly. The display is typically acceptable for certain applications.
Each location at which a control electrode crosses an emitter electrode in an FED could be tested for a short circuit defect by observing what happens when a suitable voltage is applied between the two electrodes while the remainder of the electrodes in the upper and lower levels are suitably grounded. Unfortunately, this type of short circuit testing procedure is extremely time-consuming for an PED with a large number of pixels.
Henley, U.S. Pat. No. 5,073,754, describes how a matrix-addressed liquid-crystal display ("LCD") is tested for short circuit defects using a magnetic sensor of undisclosed configuration. The magnitude of current flowing through a short circuit defect increases with the magnitude of the sensed magnetic field. Henley scans the magnetic sensor across the periphery of the LCD and then examines the magnitudes of the sensed magnetic field to detect any short circuit defects between electrical conductors in one level and crossing electrical conductors in another level. As a result, currents that characterize short circuit defects can be identified rapidly.
When magnetic fields of relatively comparable strength are detected on multiple conductors at each level, Henley has trouble determining which of the conductor-crossing locations have short circuit defects and which do not. Instead, Henley simply classifies all of the concerned conductor-crossing locations as having short circuit defects even though short circuit defects normally do not exist at some of these locations. It is desirable to have a magnetic-sensing-based technique that more accurately determines the location of short circuit defects in plate structures, especially baseplate structures of matrix-addressed flat-panel CRT displays.